Tutorial AVR I

In acest tutorial vezi cum e posibil de setat un port ca port de ieșire, cum pot fi scrise date pe port în Assembler. Cu Proteus am simulat aplicația.

E bine dacă:

– ai mai programat înainte

– știi ce e un registru

– cunoști operațile logice ( and, or, shift, not )

Ai nevoie de:

AVR Studio

ISIS Proteus

Datasheet AtMega16

Codul din tutorial:

/*
 * Tut1.asm
 *
 *  Created: 12.10.2014 22:26:18
 *   Author: Dan
 */ 


 .include "m16def.inc"  ; includerefisierului antet (cu pseudonimele registrilor)


 .equ MAX=160			; defire a constantelor
 .equ BaudRate=103
 

; definim pseudonime a registrelor de uz general
 .def tmpH  = r16
 .def tmpL  = r17
 .def idataL = r18
 .def idataH = r19
 .def s_Reg = r2

 .def cont = r20

.dseg   ; variabile in memorie SRAM
varRAM :  .BYTE 1 

.cseg
; definirea vectorilor de intrerupere
.org	0x0000
	rjmp	RESET	; Salt neconditionat
.org	INT0addr	; External Interrupt0 Vector Address
	reti
.org	INT1addr	; External Interrupt1 Vector Address
	reti

.org	INT2addr	; External Interrupt2 Vector Address
	reti
.org	OC2addr	    ; Output Compare2 Interrupt Vector Address
	reti 
.org	OVF2addr	; Overflow2 Interrupt Vector Address
	reti
.org	ICP1addr	; Input Capture1 Interrupt Vector Address
	reti
.org	OC1Aaddr	; Output Compare1A Interrupt Vector Address
	reti
.org	OC1Baddr	; Output Compare1B Interrupt Vector Address
	reti
.org	OVF1addr	; Overflow1 Interrupt Vector Address
	reti
.org	OC0addr	    ; Output Compare0 Interrupt Vector Address
	reti
.org	OVF0addr	; Overflow0 Interrupt Vector Address
	reti
.org	SPIaddr	     ; SPI Interrupt Vector Address
	reti
.org	URXCaddr	; USART Receive Complete Interrupt Vector Address
	rjmp Recive_ISR

.org	UDREaddr	; USART Data Register Empty Interrupt Vector Address
	reti
.org	UTXCaddr	; USART Transmit Complete Interrupt Vector Address
	reti
.org	ADCCaddr	; ADC Interrupt Vector Address
	reti
.org	ERDYaddr	; EEPROM Interrupt Vector Address
	reti
.org	ACIaddr 	; Analog Comparator Interrupt Vector Address
	reti
.org    TWIaddr   ; Irq. vector address for Two-Wire Interface
	reti
.org	SPMRaddr	; Store Program Memory Ready Interrupt Vector Address
	reti




RECIVE_ISR:    ;Subrutina de prelucrare a intreruperii
     in s_Reg, SREG
	 
	 in idataL, UDR
	 clr idataH
	 out OCR1AH, idataH
	 out OCR1AL, idataL

	 out SREG,s_Reg
	 reti

//--------------------
// inceput de program	 
RESET:	 
	ldi tmpL,HIGH(RAMEND)
	out SPH,tmpL
	ldi tmpL,LOW(RAMEND)
	out SPL,tmpL

	ser tmpL
	out DDRB, tmpL


 MAIN: ; programul principal

	ldi tmpL,(1<<PB1)
	out PORTB,tmpL

	RJMP MAIN

 

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